The present disclosure relates to a semiconductor integrated circuit chip mounted on a substrate by flip chip bonding.
In recent years, as the semiconductor fabrication process has been increasingly miniaturized, it has become possible to mount a large-scale circuit on a semiconductor integrated circuit chip. With this achievement, full-scale development of a system LSI, in which a set of functions conventionally constituted by a plurality of semiconductor integrated circuit chips is integrated into one semiconductor integrated circuit chip, has started. Meanwhile, while the area of a semiconductor integrated circuit chip is increasingly decreasing, the number of terminals on a semiconductor integrated circuit chip tends to be larger as a larger number of functions are integrated on one semiconductor integrated circuit chip. Therefore, to secure a necessary number of terminals, some contrivance is made where electrode pads are arranged on the entire surface of a the semiconductor integrated circuit chip, or arranged in a staggered shape on a flat periphery of the semiconductor integrated circuit chip, to allow the semiconductor integrated circuit chip to be mounted on a substrate by flip chip bonding. Also, the density of arrangement of the electrode pads is increased by devising the layout of IO cells connected to the electrode pads (see Japanese Patent Publication No. 2005-142281, for example).
FIG. 15 shows a layout of a conventional semiconductor integrated circuit chip. In connection of IO cells 11 to electrode pads 10 arranged inwardly in n rows from the outer edge of the surface of the semiconductor integrated circuit chip 100 (n=5 in FIG. 15), the IO cells 11 can be arranged efficiently in linear regions of a flat periphery of the semiconductor integrated circuit chip when the width of the IO cells 11 is m/n (m is the pitch of arrangement of the electrode pads 10).